L2+ Cache
The L2+ Cache product is a level 2 cache that operates at greater efficiencies than traditional L2 caches. This is due to the incorporation of Performance-IP's patent pending Memory Tracker Technology™. This allows the L2+ Cache's hit rates to exceed those of traditional L2 caches of the same size.
The L2+ Cache is Performance-IP's second product based on it's patent pending Memory Tracker Technology™ showing again how this technology can improve the efficiency of memory system components.
Performance-IP's L2+ Cache is a configurable level 2 cache which incorporates Performance-IP's Memory Tracker Technology™. The addition of this proprietary technology improves the efficiency of the L2+ Cache over traditional level 2 caches. This allows the L2+ Cache to achieve hit rates that exceed traditional level 2 caches that are twice the size of the L2+ Cache. This allows your designs to operate at higher levels of performance while reducing silicon area and power requirements.
- Memory Tracker Technology™
- Fully configurable cache size, line size, and number of ways
- Non-Blocking Cache Architecture
- Supports multiple Hit-Under-Miss Operation
- Supports multiple Miss-Under-Miss Operation
- Programmable Allocate-on-Write
- Cache coherency support
- ECC Support for memories
- Supports OCP, AXI3, and AXI4 bus protocols